Design & Reuse
958 IP
801
0.118
Specialty PCI IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process Gate Array true 5.0V PCI IO cells....
802
0.118
Specialty PCI IO IP, UMC 0.45um Logic process
UMC 0.5um Logic process Low Voltage Gate Array true 3.3V Oscillator IO cells....
803
0.118
Specialty PCI IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process Gate Array Low Voltage true 3.3V PCI IO cells....
804
0.118
Specialty PCI IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process Gate Array Low Voltage true 5.0V PCI IO cells....
805
0.118
Specialty PCI IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 3.3V PCI IO cells....
806
0.118
Specialty PCI IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 5.0V Oscillator IO cells....
807
0.118
Specialty PCI IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 5.0V PCI IO cells....
808
0.118
Specialty PCI IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 3.3V Oscillator IO cells....
809
0.118
Specialty PCI IO IP, UMC 65nm SP process
UMC 65nm SP/RVT Low-K Logic process 2.5VOD3.3V PCI-X IO Cell Library....
810
0.118
Specialty PCI IO IP, UMC 90nm SP process
UMC 90nm Low-K SP process true 3.3V PCI-X IO cells Library for Intellon....
811
0.118
Specialty PECL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V PECL IO with POC (Pad On Circuit)....
812
0.118
Specialty PECL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.18um G2 process
UMC 0.18um GII Logic process 3.3V LVPECL IO with POC (Pad On Circuit)....
813
0.118
Specialty PECL IO IP, UMC 0.13um HS/FSG process
UMC 0.13um HS process 3.3V PECL IO Cells....
814
0.118
Specialty PECL IO IP, UMC 0.15um G2 process
UMC 0.15um GII Logic process Low Voltage true 3.3V PECL IO cells....
815
0.118
Specialty PECL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process Low Voltage true 3.3V PECL IO cells....
816
0.118
Specialty PECL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process Low Voltage true 3.3V PECL IO Cell Library....
817
0.118
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG SSTL2 (class 1) IO for BOAC....
818
0.118
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic Library (core) 1.8V MDDR IO with POC (Pad On Circuit)....
819
0.118
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process SSTL2 (ClassI) mini BOAC IO Cells....
820
0.118
Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 90nm SP process
UMC 90nm SP/ Low-K Logic process SSTL2 (ClassI) BOAC IO Cells....
821
0.118
Specialty SSTL IO IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 2.5V/3.3V SSTL2-Class II/LVTTL combo IO with POC (Pad On Circuit)....
822
0.118
Specialty SSTL IO IP, UMC 0.13um HS/FSG process
UMC 0.13um process, SSTL2 (ClassI)/LVTTL (10mA) Combo IO Cells....
823
0.118
Specialty SSTL IO IP, UMC 0.13um HS/FSG process
UMC, 0.13um HS/FSG Logic process SSTL(2.5V) & SSTL18 (1.8V) combo IO....
824
0.118
Specialty SSTL IO IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process high speed 1.2/3.3V process Mobil DDR IO Group....
825
0.118
Specialty SSTL IO IP, UMC 0.13um LL/FSG process
UMC 0.13um Logic process, Specification for SSTL2 Class-II and LVTTL Combo IO....
826
0.118
Specialty SSTL IO IP, UMC 0.13um MS process
UMC 0.13um Mixed-Mode/RF 3.3V high gain process, SSTL2 Class I / LVTTL (10mA) combo IO....
827
0.118
Specialty SSTL IO IP, UMC 0.15um SP process
UMC 0.15um SP process standard Multi-Voltage High 3.3V Low 2.5V SSTL2 class-II with LVTTL IO cells....
828
0.118
Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process 2.5/3.3V SSTL2 ClassI/LVTTL combo IO with POC (Pad On Circuit)....
829
0.118
Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process 2.5V/3.3V SSTL2 Class II/LVTTL combo IO with POC (Pad On Circuit)....
830
0.118
Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process SSTL2 ClassI with 3.3V LVTTL combo IO Cell Library....
831
0.118
Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process SSTL2 ClassII IO group with 3.3V LVTTL combo IO Cell Library....
832
0.118
Specialty SSTL IO IP, UMC 0.18um Logic process
UMC 0.18um process SSTL2 Class-1 with 3.3V LVTTL combo....
833
0.118
Specialty SSTL IO IP, UMC 0.18um Logic process
UMC 0.18um process, SSTL2 Class-2 IO group with 3.3V LVTTL combo....
834
0.118
Specialty SSTL IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 2.5V SSTL2 IO cells....
835
0.118
Specialty SSTL IO IP, UMC 0.25um Logic process
UMC 0.25um process SSTL2 ClassI with 3.3V LVTTL combo....
836
0.118
Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Multi-Voltage metal programmable IO Cell Library....
837
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.15um SP process
UMC 0.15um SP process standard Multi-Voltage IO....
838
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.18um LL process
UMC 0.18um LL Logic process standard Multi-Voltage IO....
839
0.118
LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process
2.5V LVDS Receiver 8~135MHz, UMC 90nm SP process....
840
0.118
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um G2 process
DLL-based LVDS RX, VCC=3.3 for 20M~135MHz and VCC=2.5 for 20M~100MHz operation frequency, UMC 0.13um HS FSG Logic process....
841
0.118
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um HS/FSG process
20M~135MHz DLL-based LVDS RX, UMC 0.13um HS/FSG process....
842
0.118
LVDS Receiver IP, 500Mbps, UMC 55nm LP process
LVDS RX IO PAD 500Mbps, UMC 55nm LP/RVT Low-K Logic process....
843
0.118
LVDS Receiver IP, 700Mbps, UMC 0.13um SP/FSG process
Low Power LVDS Receiver 700Mbps, UMC 90nm SP/RVT Low-K Logic process....
844
0.118
LVDS Receiver IP, Clock: 16 MHz - 120 MHz, 6:42 data lane expansion for throughput up to 5040 Mbps, UMC 40nm LP process
LVDS RX, UMC 40nm LP/RVT Low-K Logic process....
845
0.118
LVDS Receiver IP, UMC 90nm SP process
DLL-based LVDS RX, UMC 55nm SP/RVT Low-K Logic process....
846
0.118
LVDS Rx IO IP, 500Mbps, UMC 90nm LL process
Low Power LVDS Receiver IO 500Mbps, UMC 55nm SP/RVT Low-K Logic process....
847
0.118
LVDS Rx IO IP, UMC 0.18um G2 process
0.13um LVDS RX IO PAD, UMC 0.13um HS/HVT-FSG process....
848
0.118
LVDS Rx IO IP, UMC 0.18um Logic process
LVDS RX IO, UMC 90nm SP/RVT Low-K Logic process....
849
0.118
LVDS Rx IO IP, UMC 90nm SP process
0.18UM RX (PAD), UMC 0.18um GII Logic process....
850
0.118
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process...